DRAM

DRAM (dynamic random-access memory) is the fast, volatile working memory that holds the data a computer is actively using. Each bit lives in a tiny transistor-and-capacitor cell that must be refreshed thousands of times a second. Stacked into HBM, DRAM is now a critical bottleneck for AI chips, and three firms make almost all of it.

What DRAM is, in plain terms

DRAM stands for **dynamic random-access memory**. It is the main "working memory" of almost every computer, phone, and server — the place a processor keeps the data and programs it is using *right now*. It is fast to read and write and can access any address directly (that's the "random access" part), which is why your PC's RAM sticks and a server's memory modules are DRAM. The catch is that DRAM is **volatile**: cut the power and everything stored in it vanishes. That's the difference from storage like SSDs or hard drives, which keep data when powered off but are far slower. DRAM trades permanence for speed, sitting between the ultra-fast cache inside the CPU and the slower, permanent storage below it.

How it actually works

Each DRAM bit is stored in a remarkably simple cell: **one transistor and one capacitor** (the "1T1C" design). The capacitor holds a tiny electric charge — charged means a `1`, empty means a `0` — and the transistor acts as a switch that connects the capacitor to the wiring when the cell is read or written. Because this needs only two components per bit, DRAM packs in far more memory per chip and costs much less than SRAM, which uses about six transistors per bit. The price of that density is the "dynamic" part: the charge in each capacitor **leaks away** in milliseconds, so the chip must constantly read every cell and write it back — a process called **refresh** — thousands of times per second just to keep the data alive. That refresh overhead is intrinsic to how DRAM works.

Why it matters for AI and data centers

Modern AI is bottlenecked less by raw compute and more by **memory bandwidth** — how fast data can be fed to the processor. A GPU that can't be supplied with data fast enough simply sits idle. This is where a specialized form of DRAM, **High-Bandwidth Memory (HBM)**, has become indispensable. HBM stacks 8 to 12 (and soon 16) DRAM dies vertically and links them with thousands of microscopic vertical wires called **through-silicon vias (TSVs)**. Instead of a narrow 64-bit channel like a normal DDR5 stick, each HBM stack talks over a 1,024-bit-wide interface, reaching roughly **1.2 terabytes per second per stack** on today's HBM3E. AI accelerators such as NVIDIA's Hopper and AMD's MI300 integrate several HBM stacks right next to the logic die, delivering multiple TB/s to a single chip — the bandwidth large-model training and inference demand.

Where DRAM sits in the supply chain

DRAM is one of the two big **memory** categories (the other is NAND flash, used for storage). It is made on dedicated fabs using specialized DRAM process nodes — distinct from the logic foundries (like TSMC) that build CPUs and GPUs. For AI parts, the supply chain is layered: a memory maker fabricates and stacks the DRAM into HBM, a logic chip is built by a foundry, and an **advanced-packaging** step (such as TSMC's CoWoS) joins the HBM stacks and the logic die onto one package. HBM is also wafer-hungry — it uses roughly **three times the wafer capacity** of plain DDR5 to produce the same number of bits — so diverting capacity to HBM tightens supply of ordinary memory. This is closer to electronic chiplet packaging than to optical "photonics"; DRAM itself moves data with electrical, not light, signals.

Who the key players are

DRAM is an extreme oligopoly: three companies make over 80% of it worldwide. - **Samsung** (South Korea) — historically the largest DRAM maker; led with roughly a 38% share in early 2026 data. - **SK Hynix** (South Korea) — briefly overtook Samsung in DRAM in 2025 and dominates HBM, holding around 57% of the HBM market on the strength of its NVIDIA supply deal. - **Micron Technology (MU)** (USA) — the only major U.S.-based memory maker, third in DRAM at roughly a quarter of the market and aggressively expanding in HBM. For investors, the two Korean giants aren't U.S.-listed, so country exposure is often taken via an ETF like **iShares MSCI South Korea (EWY)**, where Samsung and SK Hynix together make up a very large share of the fund — meaning EWY trades heavily on memory cycles.

What's changing right now

Memory is in the middle of an **AI-driven supercycle**. Through late 2025 and into 2026, surging HBM demand pulled wafer capacity away from conventional DRAM, and contract prices spiked — analysts cited DRAM price increases of 40–50% into the first half of 2026, with ordinary DDR5 also climbing sharply. The industry is now racing to **HBM4**, the next generation tied to NVIDIA's "Rubin" platform, with SK Hynix and Samsung pulling mass production forward to early 2026. HBM4 stacks more layers (12 and 16 high), which strains yields and keeps supply tight. Most analysts don't expect meaningful relief until **2027**, when new mega-fabs reach volume — so DRAM has shifted from a commoditized, cyclical product to a strategic AI bottleneck.

Frequently asked

What is the difference between DRAM and SRAM?

DRAM uses one transistor and one capacitor per bit, making it dense and cheap but requiring constant refresh; it is used for main system memory. SRAM uses about six transistors per bit, is much faster and needs no refresh, but is far more expensive and less dense, so it is used for small CPU caches.

Is DRAM the same as RAM?

Effectively, yes, for everyday purposes. "RAM" is the general term for working memory, and DRAM is the specific technology used for the main RAM in PCs, phones, and servers. The DDR5 sticks in a computer and the HBM on an AI chip are both forms of DRAM.

Why does DRAM lose data when the power is off?

DRAM stores each bit as a tiny electric charge in a capacitor. The charge leaks away within milliseconds and is only kept alive by constant electrical refresh. When power is removed, there is nothing to maintain the charge, so the data disappears — that is what "volatile" memory means.

What is HBM and how is it related to DRAM?

HBM (High-Bandwidth Memory) is a specialized form of DRAM. It stacks many DRAM dies vertically and connects them with thousands of through-silicon vias to deliver enormous bandwidth over a very wide interface. It is the memory of choice for AI accelerators from NVIDIA and AMD.

Which companies make DRAM?

Three companies dominate over 80% of the market: Samsung and SK Hynix of South Korea, and Micron Technology (MU) of the United States. SK Hynix currently leads in the AI-critical HBM segment, largely due to its supply relationship with NVIDIA.

Related companies

$MU $EWY